This invention relates to integrated circuits with random-access memory elements, and more particularly, to integrated circuits with static random-access-memory elements that use elevated voltages.
Integrated circuits often contain memory elements. Static random-access memory elements may be based on cross-coupled inverters and may be used to store data. Each memory element may store a single bit of data. Memory elements are typically arranged in arrays. Dual port memory elements allow reading and writing operations to be performed on two separate ports.
Dual port memory arrays are used in integrated circuits such as integrated circuit memories and programmable logic devices.
Programmable logic devices are a type of integrated circuit that can be programmed by a user to implement a desired custom logic function. In a typical scenario, a logic designer uses computer-aided design (CAD) tools to design a custom logic circuit. These tools help the designer to implement the custom logic circuit using the resources available on a given programmable logic device. When the design process is complete, the CAD tools generate configuration data files. The configuration data is loaded into programmable logic devices to configure them to perform the desired custom logic function.
Programmable logic devices generally contain arrays of static random-access memory (RAM). These memory arrays, which are sometimes referred to as embedded array blocks (EABs) are used to handle the storage needs of the circuitry on the device. During normal operation of a programmable logic device, the hardwired and programmable circuitry of the device performs read and write operations on the memory of the blocks. Memory arrays on a programmable logic device typically range in size from a few kilobits to about a megabit or more.
Integrated circuits such as programmable logic devices are often configured to implement memory-based circuits such as clock conversion first-in-first-out (FIFO) circuits. In a typical scenario, data is written into a FIFO using one clock signal and is read out of the FIFO using another clock signal.
Circuits such as FIFO circuits on programmable logic devices are implemented using dual port random-access-memory arrays. Dual port memory arrays are also used in application specific integrated circuits and stand-alone memory chips.
Dual port memory arrays have two independent ports, which can be used for read and write operations. On programmable logic device integrated circuits with dual port memory arrays, programmable logic circuitry and a dual port memory array can be configured to implement a FIFO. One of the dual port memory array's ports is used for write operations, while the other of the dual port memory array's ports is used for read operations.
Dual port memory arrays contain rows and columns of memory cells. Dual port memory array cells are accessed using word lines and bit lines. Because there are two ports associated with each cell, there are two sets of word lines and two sets of bit lines associated with each memory array.
In modern integrated circuit designs, care must be taken to design memory element cells so that they consume relatively small amounts of circuit real estate. At the same time, memory elements must be designed so that operations on the memory elements can be performed reliably. These design requirements sometimes pose challenges for a circuit designer. For example, to ensure that read operations are performed reliably, it may be desirable to provide a memory element with relative large transistors in the cross-coupled inverters. Making the transistors in the cross-coupled inverters strong helps to ensure that precharged data lines do not cause the memory element to flip states during a read operation. At the same time, use of overly large transistors in the memory element may consume undesirably large amounts of real estate on an integrated circuit.
It would therefore be desirable to provide improved memory elements.